1 #ifndef MSHADOW_TENSOR_H
2 #define MSHADOW_TENSOR_H
22 template<
int dimension>
60 if (s.
shape_[i] != this->shape_[i])
return false;
82 MSHADOW_XINLINE
size_t Size(
void)
const{
83 size_t memsz = this->
shape_[ 0 ];
86 memsz *= this->
shape_[ i ];
91 MSHADOW_XINLINE
size_t MSize(
void)
const {
95 memsz *= this->
shape_[ i ];
107 for (
int i = dimstart; i < dimend; ++i) {
165 s[0] = s0; s[1] = s1; s[2] = s2; s.
stride_ = s0;
178 s[0] = s0; s[1] = s1; s[2] = s2; s[3] = s3; s.
stride_ = s0;
205 template<
typename Device,
int dimension>
251 s[ dimension - 1 ] = end - begin;
275 template<
typename Device>
281 MSHADOW_XINLINE
Tensor(
void) {}
291 s[0] = s.
stride_ = end - begin;
352 inline void FreeSpace(Tensor<cpu,dim> &obj);
355 inline void FreeSpace(Tensor<gpu,dim> &obj);
366 template<
typename Device,
int dim>
376 inline void Copy(Tensor<cpu,dim> dst,
const Tensor<cpu,dim> &src );
379 inline void Copy(Tensor<cpu,dim> dst,
const Tensor<gpu,dim> &src );
382 inline void Copy(Tensor<gpu,dim> dst,
const Tensor<cpu,dim> &src );
385 inline void Copy(Tensor<gpu,dim> dst,
const Tensor<gpu,dim> &src );
393 inline void Softmax( Tensor<cpu,2> dst,
const Tensor<cpu,2> &energy );
395 inline void Softmax( Tensor<gpu,2> dst,
const Tensor<gpu,2> &energy );
414 template<
typename Saver,
int dim,
typename E,
int etype>
415 inline void MapExp(Tensor<cpu,dim> dst,
const expr::Exp<E,etype> &exp );
417 template<
typename Saver,
int dim,
typename E,
int etype>
418 inline void MapExp(Tensor<gpu,dim> dst,
const expr::Exp<E,etype> &exp );
431 template<
typename Saver,
typename Reducer,
typename E,
int etype>
434 template<
typename Saver,
typename Reducer,
typename E,
int etype>
450 template<
typename Saver,
typename Reducer,
int dimkeep,
typename E,
int etype>
453 template<
typename Saver,
typename Reducer,
int dimkeep,
typename E,
int etype>
static const int kSubShape
maximum dimension minus 1
Definition: tensor.h:28
void MapExp(Tensor< cpu, dim > dst, const expr::Exp< E, etype > &exp)
CPU/GPU: map a expression to a tensor, this function calls MapPlan.
Definition: tensor_cpu-inl.hpp:87
unsigned index_t
type that will be used for index
Definition: tensor_base.h:123
Tensor< Device, dim > NewTensor(const Shape< dim > &shape, real_t initv, bool pad=MSHADOW_ALLOC_PAD)
CPU/GPU: short cut to allocate and initialize a Tensor.
Definition: tensor_cpu-inl.hpp:28
MSHADOW_XINLINE Tensor< Device, dimension > Slice(index_t begin, index_t end) const
slice the tensor in highest dimension [begin,end)
Definition: tensor.h:249
void MapReduceKeepLowest(Tensor< cpu, 1 > dst, const expr::Exp< E, etype > &exp, real_t scale=1.0f)
CPU/GPU: map a expression, do reduction to 1D Tensor in lowest dimension (dimension 0) ...
Definition: tensor_cpu-inl.hpp:100
MSHADOW_XINLINE Tensor(const Shape< dimension > &shape)
constructor from shape
Definition: tensor.h:222
static const int kSubdim
dimension of subtype
Definition: tensor.h:211
shape of a tensor IMPORTANT NOTE: this shape is different from numpy.shape shape[0] gives the lowest ...
Definition: tensor.h:23
MSHADOW_XINLINE Shape< 4 > Shape4(index_t s3, index_t s2, index_t s1, index_t s0)
construct a four dimension shape, stride will equal s0
Definition: tensor.h:176
void FreeSpace(Tensor< cpu, dim > &obj)
CPU/GPU: free the space of tensor, will set obj.dptr to NULL.
Definition: tensor_cpu-inl.hpp:36
Tensor< Device, dimension > & operator=(const expr::Exp< E, expr::type::kMapper > &exp)
functions to fit expression template
Definition: tensor.h:262
MSHADOW_XINLINE Tensor(real_t *dptr, const Shape< dimension > &shape)
constructor from data pointer and shape
Definition: tensor.h:224
MSHADOW_XINLINE index_t & operator[](index_t idx)
get corresponding index
Definition: tensor.h:45
Random inline functions for tensor.
MSHADOW_XINLINE Shape< 2 > FlatTo2D(void) const
Definition: tensor.h:68
MSHADOW_XINLINE Tensor< Device, kSubdim > operator[](index_t idx) const
get a element of dimension - 1
Definition: tensor.h:238
index_t shape_[kMaxShape]
storing the dimension information
Definition: tensor.h:129
void InitTensorEngine(int device_id=0)
initialize tensor engine, used to call intialization functions of dependent libs this function should...
Definition: tensor_gpu-inl.hpp:26
void MapReduceKeepHighDim(Tensor< cpu, 1 > dst, const expr::Exp< E, etype > &exp, real_t scale=1.0f)
CPU/GPU: map a expression, do reduction to 1D Tensor in third dimension (dimension 2) ...
Definition: tensor_cpu-inl.hpp:119
float real_t
type that will be used for content
Definition: tensor_base.h:118
static const bool kDevCPU
whether this device is CPU or not
Definition: tensor.h:187
Tensor< Device, dimension > & operator=(const expr::Exp< E, expr::type::kComplex > &exp)
functions to fit expression template
Definition: tensor.h:267
void Softmax(Tensor< cpu, 2 > dst, const Tensor< cpu, 2 > &energy)
CPU/GPU: normalize softmax: dst[i][j] = exp( energy[i][j] ) /( sum_j exp( energy[i][j] ) ) ...
Definition: tensor_cpu-inl.hpp:160
static const bool kDevCPU
whether current type lies in cpu
Definition: tensor.h:209
implementation of CPU host code
MSHADOW_XINLINE Shape< kSubShape > SubShape(void) const
get subshape
Definition: tensor.h:116
static const int kMaxShape
maximum dimension of tensor
Definition: tensor.h:26
device name CPU
Definition: tensor.h:185
device name CPU
Definition: tensor.h:192
static const int kDevMask
device flag number, identifies this device
Definition: tensor.h:196
MSHADOW_XINLINE Shape< 3 > Shape3(index_t s2, index_t s1, index_t s0)
construct a three dimension shape, stride will equal s0
Definition: tensor.h:163
definitions of how expressions should be evaluated
MSHADOW_XINLINE Shape< 2 > Shape2(index_t s1, index_t s0)
construct a two dimension shape, stride will equal s0
Definition: tensor.h:152
Tensor< Device, dimension > & operator=(real_t s)
functions to fit expression template
Definition: tensor.h:257
MSHADOW_XINLINE size_t MSize(void) const
Definition: tensor.h:91
MSHADOW_XINLINE index_t ProdShape(int dimstart, int dimend) const
Definition: tensor.h:104
MSHADOW_XINLINE Shape(const Shape< dimension > &s)
constuctor
Definition: tensor.h:33
implementation of GPU host code
MSHADOW_XINLINE Shape< 1 > Shape1(index_t s0)
construct a one dimension shape, stride will equal s0
Definition: tensor.h:142
Tensor< Device, dimension > & __assign(real_t s)
operator overload
Definition: tensor_expr.h:119
#define MSHADOW_ALLOC_PAD
whether do padding during allocation
Definition: tensor_base.h:23
MSHADOW_XINLINE Shape(void)
default constructor, do nothing
Definition: tensor.h:31
definitions of base types, macros functions
static const int kDevMask
device flag number, identifies this device
Definition: tensor.h:189
real_t * dptr
pointer to the data
Definition: tensor.h:215
MSHADOW_XINLINE Tensor< Device, 2 > FlatTo2D(void) const
flatten the tensor to 2 dimension, collapse the higher dimensions together
Definition: tensor.h:229
void ShutdownTensorEngine(void)
Shutdown tensor engine, this function should be called after all GPU tensor operations, for using tensors in CPU, this call is actually not needed.
Definition: tensor_gpu-inl.hpp:45
void Copy(Tensor< cpu, dim > dst, const Tensor< cpu, dim > &src)
copy data from one tensor to another, with same shape
Definition: tensor_cpu-inl.hpp:42
Shape< dimension > shape
shape of the tensor
Definition: tensor.h:217
void AllocSpace(Tensor< cpu, dim > &obj, bool pad=MSHADOW_ALLOC_PAD)
CPU/CPU: allocate space for CTensor, according to the shape in the obj this function is responsible t...
Definition: tensor_cpu-inl.hpp:14
base class for expression
Definition: tensor_expr.h:49
MSHADOW_XINLINE Tensor(void)
default constructor
Definition: tensor.h:220
tensor container that does memory allocation and resize like STL
MSHADOW_XINLINE size_t Size(void) const
Definition: tensor.h:82
some extension of expressions, used to support something beyond elementwise op
base class of all variables, that can be assigned to values
Definition: tensor_expr.h:40
definitions of abstract expressions and expressions template
general tensor
Definition: tensor.h:206
MSHADOW_XINLINE bool operator==(const Shape< kMaxShape > &s) const
Definition: tensor.h:57
PaddingExp< SrcExp, ExpInfo< SrcExp >::kDim > pad(const Exp< SrcExp, etype > &src, index_t pad)
padding expression, pad a image with zeros on boundaries, padding affects shape[0], and shape[1]
Definition: tensor_expr_ext.h:496
static const bool kDevCPU
whether this device is CPU or not
Definition: tensor.h:194
MSHADOW_XINLINE const index_t & operator[](index_t idx) const
get corresponding index
Definition: tensor.h:53
index_t stride_
storing the stride information in x dimension this is used to deal with pitch allocation in gpu or ss...
Definition: tensor.h:134
definitions of I/O functions for mshadow tensor