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tensor.h
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1 #ifndef MSHADOW_TENSOR_H
2 #define MSHADOW_TENSOR_H
3 
11 #include "tensor_base.h"
12 #include "tensor_expr.h"
13 
14 namespace mshadow {
22  template<int dimension>
23  struct Shape {
24  public:
26  const static int kMaxShape = dimension;
28  const static int kSubShape = dimension - 1;
29  public:
31  MSHADOW_XINLINE Shape(void) {}
33  MSHADOW_XINLINE Shape( const Shape<dimension> &s ){
34  #pragma unroll
35  for( int i = 0; i < kMaxShape; ++i ){
36  this->shape_[i] = s[i];
37  }
38  this->stride_ = s.stride_;
39  }
45  MSHADOW_XINLINE index_t& operator[](index_t idx) {
46  return shape_[ idx ];
47  }
53  MSHADOW_XINLINE const index_t& operator[](index_t idx) const {
54  return shape_[ idx ];
55  }
57  MSHADOW_XINLINE bool operator==(const Shape<kMaxShape> &s) const {
58  #pragma unroll
59  for ( int i = 0; i < kMaxShape; ++i ) {
60  if (s.shape_[i] != this->shape_[i]) return false;
61  }
62  return true;
63  }
68  MSHADOW_XINLINE Shape<2> FlatTo2D(void) const {
69  Shape<2> s;
70  s.stride_ = this->stride_;
71  s.shape_[ 0 ] = this->shape_[ 0 ];
72  index_t ymax = 1;
73 
74  #pragma unroll
75  for (int i = 1; i < kMaxShape; ++i) {
76  ymax *= this->shape_[ i ];
77  }
78  s.shape_[1] = ymax;
79  return s;
80  }
82  MSHADOW_XINLINE size_t Size(void) const{
83  size_t memsz = this->shape_[ 0 ];
84  #pragma unroll
85  for (int i = 1; i < kMaxShape; ++i) {
86  memsz *= this->shape_[ i ];
87  }
88  return memsz;
89  }
91  MSHADOW_XINLINE size_t MSize(void) const {
92  size_t memsz = this->stride_;
93  #pragma unroll
94  for (int i = 1; i < kMaxShape; ++i) {
95  memsz *= this->shape_[ i ];
96  }
97  return memsz;
98  }
104  MSHADOW_XINLINE index_t ProdShape( int dimstart, int dimend ) const{
105  index_t num = 1;
106  #pragma unroll
107  for (int i = dimstart; i < dimend; ++i) {
108  num *= this->shape_[ i ];
109  }
110  return num;
111  }
116  MSHADOW_XINLINE Shape<kSubShape> SubShape(void) const {
118  s.stride_ = this->stride_;
119  // for cuda
120  #pragma unroll
121  for (int i = 0; i < kSubShape; ++i) {
122  s.shape_[ i ] = this->shape_[ i ];
123  }
124  return s;
125  }
126 
127  public:
135  };
136  // useful construction functions to generate shape
142  MSHADOW_XINLINE Shape<1> Shape1( index_t s0 ){
143  Shape<1> s; s[0] = s0; s.stride_ = s0;
144  return s;
145  }
152  MSHADOW_XINLINE Shape<2> Shape2( index_t s1, index_t s0 ){
153  Shape<2> s; s[0] = s0; s[1] = s1; s.stride_ = s0;
154  return s;
155  }
163  MSHADOW_XINLINE Shape<3> Shape3( index_t s2, index_t s1, index_t s0 ){
164  Shape<3> s;
165  s[0] = s0; s[1] = s1; s[2] = s2; s.stride_ = s0;
166  return s;
167  }
176  MSHADOW_XINLINE Shape<4> Shape4( index_t s3, index_t s2, index_t s1, index_t s0 ){
177  Shape<4> s;
178  s[0] = s0; s[1] = s1; s[2] = s2; s[3] = s3; s.stride_ = s0;
179  return s;
180  }
181 }; // namespace mshadow
182 
183 namespace mshadow {
185  struct cpu {
187  const static bool kDevCPU = true;
189  const static int kDevMask = 1<<0;
190  };
192  struct gpu {
194  const static bool kDevCPU = false;
196  const static int kDevMask = 1<<1;
197  };
198 
199  // more compact template
205  template<typename Device, int dimension>
206  struct Tensor: public expr::ContainerExp< Tensor<Device,dimension> >{
207  public:
209  const static bool kDevCPU = Device::kDevCPU;
211  const static int kSubdim = dimension - 1;
212 
213  public:
218  public:
220  MSHADOW_XINLINE Tensor(void) {}
222  MSHADOW_XINLINE Tensor(const Shape<dimension> &shape): shape(shape) {}
224  MSHADOW_XINLINE Tensor(real_t *dptr, const Shape<dimension> &shape): dptr((real_t*)dptr), shape(shape) {}
229  MSHADOW_XINLINE Tensor<Device, 2> FlatTo2D(void) const {
230  return Tensor<Device, 2>(reinterpret_cast<real_t*> \
231  (dptr), shape.FlatTo2D());
232  }
238  MSHADOW_XINLINE Tensor<Device, kSubdim> operator[](index_t idx) const {
239  Shape<kSubdim> s = shape.SubShape();
240  return Tensor<Device, kSubdim>(reinterpret_cast<real_t*> \
241  (dptr) + s.MSize() * idx, s);
242  }
249  MSHADOW_XINLINE Tensor<Device, dimension> Slice(index_t begin, index_t end) const {
250  Shape<dimension> s = this->shape;
251  s[ dimension - 1 ] = end - begin;
252  return Tensor<Device, dimension>(reinterpret_cast<real_t*>\
253  (dptr) + s.SubShape().MSize() * begin, s);
254  }
255  public:
258  return this->__assign( s );
259  }
261  template<typename E>
263  return this->__assign( exp );
264  }
266  template<typename E>
268  return this->__assign( exp );
269  }
270  };
271 
272  /*
273  * respecialized class Tensor1D,thei is due to different implementation in operator[]
274  */
275  template<typename Device>
276  struct Tensor<Device,1>: public expr::ContainerExp< Tensor<Device,1> >{
277  public:
278  real_t *dptr;
279  Shape<1> shape;
280  public:
281  MSHADOW_XINLINE Tensor(void) {}
282  MSHADOW_XINLINE Tensor(const Shape<1> &shape): shape(shape) {}
283  MSHADOW_XINLINE Tensor(real_t *dptr, Shape<1> shape) :dptr(dptr), shape(shape) {}
284 
285  MSHADOW_XINLINE Tensor<Device, 2> FlatTo2D(void) const {
286  return Tensor<Device, 2>(reinterpret_cast<real_t*> \
287  (dptr), shape.FlatTo2D());
288  }
289  MSHADOW_XINLINE Tensor<Device, 1> Slice(index_t begin, index_t end) const {
290  Shape<1> s;
291  s[0] = s.stride_ = end - begin;
292  return Tensor<Device, 1>(reinterpret_cast<real_t*> \
293  (dptr) + begin, s);
294  }
295  MSHADOW_XINLINE real_t &operator[](index_t idx) { return dptr[ idx ]; }
296  MSHADOW_XINLINE const real_t &operator[](index_t idx)const { return dptr[ idx ]; }
297  public:
298  // functions to fit expression template
299  inline Tensor<Device,1>& operator=( double s ){
300  return this->__assign( s );
301  }
302  template<typename E>
304  return this->__assign( exp );
305  }
306  template<typename E>
308  return this->__assign( exp );
309  }
310  };
311 }; // namespace mshadow
312 
313 // add unroll loops for the shape
314 namespace mshadow {
315  // function declarations
322  inline void InitTensorEngine( int device_id=0 );
328  inline void ShutdownTensorEngine( void );
329 
340  template<int dim>
341  inline void AllocSpace(Tensor<cpu,dim> &obj, bool pad = MSHADOW_ALLOC_PAD);
343  template<int dim>
344  inline void AllocSpace(Tensor<gpu,dim> &obj, bool pad = MSHADOW_ALLOC_PAD);
345 
351  template<int dim>
352  inline void FreeSpace(Tensor<cpu,dim> &obj);
354  template<int dim>
355  inline void FreeSpace(Tensor<gpu,dim> &obj);
356 
366  template<typename Device, int dim>
367  inline Tensor<Device,dim> NewTensor(const Shape<dim> &shape, real_t initv, bool pad = MSHADOW_ALLOC_PAD);
368 
375  template<int dim>
376  inline void Copy(Tensor<cpu,dim> dst, const Tensor<cpu,dim> &src );
378  template<int dim>
379  inline void Copy(Tensor<cpu,dim> dst, const Tensor<gpu,dim> &src );
381  template<int dim>
382  inline void Copy(Tensor<gpu,dim> dst, const Tensor<cpu,dim> &src );
384  template<int dim>
385  inline void Copy(Tensor<gpu,dim> dst, const Tensor<gpu,dim> &src );
386 
387 
393  inline void Softmax( Tensor<cpu,2> dst, const Tensor<cpu,2> &energy );
395  inline void Softmax( Tensor<gpu,2> dst, const Tensor<gpu,2> &energy );
396 
397 }; // namespace mshadow
398 
399 
400 namespace mshadow{
401  // function declarations to support expression, no need to understand them
402  // these functions do not need to be directly used
403 
414  template<typename Saver, int dim, typename E, int etype>
415  inline void MapExp(Tensor<cpu,dim> dst, const expr::Exp<E,etype> &exp );
417  template<typename Saver, int dim, typename E, int etype>
418  inline void MapExp(Tensor<gpu,dim> dst, const expr::Exp<E,etype> &exp );
419 
431  template<typename Saver, typename Reducer, typename E, int etype>
432  inline void MapReduceKeepLowest( Tensor<cpu,1> dst, const expr::Exp<E,etype> &exp, real_t scale = 1.0f );
434  template<typename Saver, typename Reducer, typename E, int etype>
435  inline void MapReduceKeepLowest( Tensor<gpu,1> dst, const expr::Exp<E,etype> &exp, real_t scale = 1.0f );
436 
437 
450  template<typename Saver, typename Reducer, int dimkeep, typename E, int etype>
451  inline void MapReduceKeepHighDim( Tensor<cpu,1> dst, const expr::Exp<E,etype> &exp, real_t scale = 1.0f );
453  template<typename Saver, typename Reducer, int dimkeep, typename E, int etype>
454  inline void MapReduceKeepHighDim( Tensor<gpu,1> dst, const expr::Exp<E,etype> &exp, real_t scale = 1.0f );
455 
456 };// namespace mshadow
457 
458 // execution implementation of expression evaluations
460 // cpu implementation of functions
461 #include "tensor_cpu-inl.hpp"
462 // gpu implementation of functions
463 #include "tensor_gpu-inl.hpp"
464 // extension of expressions
465 #include "tensor_expr_ext.h"
466 // io
467 #include "tensor_io.h"
468 // container
469 #include "tensor_container.h"
470 // random number generator
471 #include "tensor_random.h"
472 #endif // TENSOR_H
static const int kSubShape
maximum dimension minus 1
Definition: tensor.h:28
void MapExp(Tensor< cpu, dim > dst, const expr::Exp< E, etype > &exp)
CPU/GPU: map a expression to a tensor, this function calls MapPlan.
Definition: tensor_cpu-inl.hpp:87
unsigned index_t
type that will be used for index
Definition: tensor_base.h:123
Tensor< Device, dim > NewTensor(const Shape< dim > &shape, real_t initv, bool pad=MSHADOW_ALLOC_PAD)
CPU/GPU: short cut to allocate and initialize a Tensor.
Definition: tensor_cpu-inl.hpp:28
MSHADOW_XINLINE Tensor< Device, dimension > Slice(index_t begin, index_t end) const
slice the tensor in highest dimension [begin,end)
Definition: tensor.h:249
void MapReduceKeepLowest(Tensor< cpu, 1 > dst, const expr::Exp< E, etype > &exp, real_t scale=1.0f)
CPU/GPU: map a expression, do reduction to 1D Tensor in lowest dimension (dimension 0) ...
Definition: tensor_cpu-inl.hpp:100
MSHADOW_XINLINE Tensor(const Shape< dimension > &shape)
constructor from shape
Definition: tensor.h:222
static const int kSubdim
dimension of subtype
Definition: tensor.h:211
shape of a tensor IMPORTANT NOTE: this shape is different from numpy.shape shape[0] gives the lowest ...
Definition: tensor.h:23
MSHADOW_XINLINE Shape< 4 > Shape4(index_t s3, index_t s2, index_t s1, index_t s0)
construct a four dimension shape, stride will equal s0
Definition: tensor.h:176
void FreeSpace(Tensor< cpu, dim > &obj)
CPU/GPU: free the space of tensor, will set obj.dptr to NULL.
Definition: tensor_cpu-inl.hpp:36
Tensor< Device, dimension > & operator=(const expr::Exp< E, expr::type::kMapper > &exp)
functions to fit expression template
Definition: tensor.h:262
MSHADOW_XINLINE Tensor(real_t *dptr, const Shape< dimension > &shape)
constructor from data pointer and shape
Definition: tensor.h:224
MSHADOW_XINLINE index_t & operator[](index_t idx)
get corresponding index
Definition: tensor.h:45
Random inline functions for tensor.
MSHADOW_XINLINE Shape< 2 > FlatTo2D(void) const
Definition: tensor.h:68
MSHADOW_XINLINE Tensor< Device, kSubdim > operator[](index_t idx) const
get a element of dimension - 1
Definition: tensor.h:238
index_t shape_[kMaxShape]
storing the dimension information
Definition: tensor.h:129
void InitTensorEngine(int device_id=0)
initialize tensor engine, used to call intialization functions of dependent libs this function should...
Definition: tensor_gpu-inl.hpp:26
void MapReduceKeepHighDim(Tensor< cpu, 1 > dst, const expr::Exp< E, etype > &exp, real_t scale=1.0f)
CPU/GPU: map a expression, do reduction to 1D Tensor in third dimension (dimension 2) ...
Definition: tensor_cpu-inl.hpp:119
float real_t
type that will be used for content
Definition: tensor_base.h:118
static const bool kDevCPU
whether this device is CPU or not
Definition: tensor.h:187
Tensor< Device, dimension > & operator=(const expr::Exp< E, expr::type::kComplex > &exp)
functions to fit expression template
Definition: tensor.h:267
void Softmax(Tensor< cpu, 2 > dst, const Tensor< cpu, 2 > &energy)
CPU/GPU: normalize softmax: dst[i][j] = exp( energy[i][j] ) /( sum_j exp( energy[i][j] ) ) ...
Definition: tensor_cpu-inl.hpp:160
static const bool kDevCPU
whether current type lies in cpu
Definition: tensor.h:209
implementation of CPU host code
MSHADOW_XINLINE Shape< kSubShape > SubShape(void) const
get subshape
Definition: tensor.h:116
static const int kMaxShape
maximum dimension of tensor
Definition: tensor.h:26
device name CPU
Definition: tensor.h:185
device name CPU
Definition: tensor.h:192
static const int kDevMask
device flag number, identifies this device
Definition: tensor.h:196
MSHADOW_XINLINE Shape< 3 > Shape3(index_t s2, index_t s1, index_t s0)
construct a three dimension shape, stride will equal s0
Definition: tensor.h:163
definitions of how expressions should be evaluated
MSHADOW_XINLINE Shape< 2 > Shape2(index_t s1, index_t s0)
construct a two dimension shape, stride will equal s0
Definition: tensor.h:152
Tensor< Device, dimension > & operator=(real_t s)
functions to fit expression template
Definition: tensor.h:257
Definition: tensor.h:276
MSHADOW_XINLINE size_t MSize(void) const
Definition: tensor.h:91
MSHADOW_XINLINE index_t ProdShape(int dimstart, int dimend) const
Definition: tensor.h:104
MSHADOW_XINLINE Shape(const Shape< dimension > &s)
constuctor
Definition: tensor.h:33
implementation of GPU host code
MSHADOW_XINLINE Shape< 1 > Shape1(index_t s0)
construct a one dimension shape, stride will equal s0
Definition: tensor.h:142
Tensor< Device, dimension > & __assign(real_t s)
operator overload
Definition: tensor_expr.h:119
#define MSHADOW_ALLOC_PAD
whether do padding during allocation
Definition: tensor_base.h:23
MSHADOW_XINLINE Shape(void)
default constructor, do nothing
Definition: tensor.h:31
definitions of base types, macros functions
static const int kDevMask
device flag number, identifies this device
Definition: tensor.h:189
real_t * dptr
pointer to the data
Definition: tensor.h:215
MSHADOW_XINLINE Tensor< Device, 2 > FlatTo2D(void) const
flatten the tensor to 2 dimension, collapse the higher dimensions together
Definition: tensor.h:229
void ShutdownTensorEngine(void)
Shutdown tensor engine, this function should be called after all GPU tensor operations, for using tensors in CPU, this call is actually not needed.
Definition: tensor_gpu-inl.hpp:45
void Copy(Tensor< cpu, dim > dst, const Tensor< cpu, dim > &src)
copy data from one tensor to another, with same shape
Definition: tensor_cpu-inl.hpp:42
Shape< dimension > shape
shape of the tensor
Definition: tensor.h:217
void AllocSpace(Tensor< cpu, dim > &obj, bool pad=MSHADOW_ALLOC_PAD)
CPU/CPU: allocate space for CTensor, according to the shape in the obj this function is responsible t...
Definition: tensor_cpu-inl.hpp:14
base class for expression
Definition: tensor_expr.h:49
MSHADOW_XINLINE Tensor(void)
default constructor
Definition: tensor.h:220
tensor container that does memory allocation and resize like STL
MSHADOW_XINLINE size_t Size(void) const
Definition: tensor.h:82
some extension of expressions, used to support something beyond elementwise op
base class of all variables, that can be assigned to values
Definition: tensor_expr.h:40
definitions of abstract expressions and expressions template
general tensor
Definition: tensor.h:206
MSHADOW_XINLINE bool operator==(const Shape< kMaxShape > &s) const
Definition: tensor.h:57
PaddingExp< SrcExp, ExpInfo< SrcExp >::kDim > pad(const Exp< SrcExp, etype > &src, index_t pad)
padding expression, pad a image with zeros on boundaries, padding affects shape[0], and shape[1]
Definition: tensor_expr_ext.h:496
static const bool kDevCPU
whether this device is CPU or not
Definition: tensor.h:194
MSHADOW_XINLINE const index_t & operator[](index_t idx) const
get corresponding index
Definition: tensor.h:53
index_t stride_
storing the stride information in x dimension this is used to deal with pitch allocation in gpu or ss...
Definition: tensor.h:134
definitions of I/O functions for mshadow tensor